41% More Revenue, 10% More Wafers: The Lithography Ceiling Behind TSMC’s Growth

The Planning Consequence

Anyone budgeting for leading-edge silicon through 2028 depends on two suppliers with no near substitute. TSMC took 72.5% of top-ten foundry revenue in 2Q26, according to TrendForce⁶. ASML, the only supplier of extreme-ultraviolet (EUV) lithography tools, told investors on 14 October 2026 that "our supply as currently planned for both 2027 and 2028 will not fully meet the demand of our customers"³.

The third-quarter numbers show what that does to the market. TSMC shipped 9.6% more wafers than a year earlier. Its US dollar revenue rose 41.2%². The extra money came from value per wafer, not from more wafers. A planner who tracks wafer counts, tool counts or announced capacity as if they were the same thing will misread how much supply is coming, when, and at what price.

What Exists, and at What Scale

The foundry

TSMC's 3Q26 management report gives these figures, stated as reported²:

Wafer volume rose 3.2% on the quarter and 9.6% on the year. US dollar revenue rose 16.2% and 41.2% over the same periods. In New Taiwan dollars, revenue grew 50.9% year on year to NT$1,494.24 billion; part of the gap to the US dollar figure is currency, since the average rate moved from 29.91 to 31.98 NT$ per US$². TSMC's press release notes that the 3Q26 figures "have not been approved by Board of Directors"¹.

Advanced technologies, meaning 7nm and below, made up 79% of wafer revenue¹. TSMC attributes the 1.3-point fall in gross margin from 2Q26 "primarily" to "the margin dilution from the initial ramp-up of N2 technology"². Guidance for 4Q26 is US$52.3–54.3 billion in revenue at a 65–67% gross margin¹.

The toolmaker

ASML's chief financial officer, Roger Dassen, said on the 3Q26 call: "We anticipate output of roughly 65 systems for 2026, which is nearly 50% more than the 44 systems that we shipped last year"⁴. In context, both numbers are low-NA EUV systems. The 44 is a shipment count. The 65 is a plan.

ASML's 2025 annual report gives a different number: 48 EUV systems under "system sales in units"⁵. That is a sales figure, it covers all EUV including High-NA, and it is not defined as shipments. The four-unit difference is most likely the High-NA systems, but no source we opened confirms that split. The two figures should not be added together, and neither should be read as a correction of the other.

In 3Q26 ASML sold 113 new lithography systems of all types and reported €11.66 billion in total net sales at a 57.5% gross margin³. EUV system sales were €4.1 billion, "including the sale of one High-NA EUV system"⁴. Full-year 2026 guidance is €44–45 billion at around 56% gross margin³.

The Basis of Each Figure

Figures on this topic are often quoted as if they were all the same kind of number. They are not.

Almost every supply figure in this story comes from the company that sells the supply. The only independent number is TrendForce's market share, which measures revenue, not capacity.

Volume Versus Value

Dividing TSMC's US dollar revenue by its 12-inch-equivalent wafer shipments gives about US$10,440 per wafer in 3Q26. The same sum gives about US$8,100 in 3Q25 and about US$9,270 in 2Q26. That is a 28.8% rise in a year and a 12.6% rise in one quarter.

Revenue per wafer is a derived, blended figure. Its numerator includes revenue that is not from wafers, such as packaging. Its denominator treats a 2nm wafer and a mature-node wafer as one unit each. It shows that value per wafer is rising. It does not show why.

The disclosures cannot separate three causes. One is mix: 3nm and 2nm went from 23% to 41% of wafer revenue in a year². The second is price: TSMC has not published prices by node. The third is advanced packaging, whose capacity TSMC described in July as tight, according to Newsquawk's summary of the call⁸. Anyone who tells you how much of the 28.8% is price is guessing.

What the figures do show is enough for planning. AI demand at TSMC is being met mostly by shifting existing wafer output to higher-value nodes, at margins in the high sixties. TrendForce reports TSMC's 5/4nm and 3nm capacity as "fully booked"⁶. A buyer whose demand is growing faster than about 10% a year in wafers is competing for share of a slowly growing pool.

What Limits It

The lithography ceiling

ASML has not said how large the shortfall is. Its chief executive, Christophe Fouquet, declined to give numbers: "I won't give new numbers for 27 or 28 because it's far too early"⁴. The company's stated plan is to raise 2026 low-NA EUV and DUV immersion capacity by 30% in 2027 and to investigate a further 30% in 2028³. It is now looking at going beyond that for 2028³.

Applying 30% to roughly 65 systems gives about 85. That is arithmetic, not a forecast. The 30% applies to capacity, not shipments, and ASML says its planned capacity already falls short of demand. Fouquet named the limit: "the main challenge with all our suppliers ... is to make sure that they can go up 30% every year"⁴. So the ceiling is in ASML's supply chain as well as its own plants.

Orders not yet accepted

The clearest sign of rationing is a refusal. Customers want to place orders for 2029 and 2030. ASML has not accepted them yet. Dassen said the company wants "a good picture of what the overall demand in 2029 and 2030 looks like" before it does⁴. No cancellations or write-downs appear in the sources.

The foundry's own statements

According to Newsquawk's summary of its July call, TSMC said it does not foresee a bottleneck for its capacity expansion plan and will not abruptly raise prices⁸. It raised its 2026 capital spending guidance to US$60–64 billion from US$52–56 billion⁸. The management report shows US$40.64 billion spent by the end of 3Q26². TSMC does not publish capacity or utilisation, so its claim of no bottleneck cannot be checked against its own data.

What This Does and Does Not Establish

It establishes, from company filings:

• leading-edge growth at the dominant foundry is now driven by value, not volume: +9.6% wafers against +41.2% US dollar revenue;
• the only EUV supplier says its planned output for 2027 and 2028 will not fully meet demand, and it is holding back orders for 2029–30;
• both chokepoints are single suppliers, and almost every number about their supply comes from the supplier itself.

It does not establish:

• how much of the rise in value per wafer is price, mix or packaging;
• TSMC's capacity or utilisation at any node;
• how many EUV units ASML will ship in 2027 or 2028, or how big the shortfall is;
• that demand will in fact exceed supply. That claim is ASML's view of its customers' forecasts. No independent measure of tool demand was found.

The newest third-party capacity baseline is SEMI's June 2025 projection of 1.16 million wafers per month at 7nm and below in 2026⁷. It is more than a year old and was a projection when made. Its headline growth of "approximately 69%" also does not match its own endpoints: 850,000 to 1.4 million wafers per month is about 65%. It is a rough context figure, not a capacity count.

The Judgement

Treat leading-edge supply through 2028 as allocated, not as a volume you can simply buy more of. The figures support three working rules.

1. Plan in wafers, not revenue. TSMC's revenue growth overstates growth in physical output roughly fourfold.
2. Treat ASML's ~65-unit 2026 figure and its 30% steps as ceilings it has planned for, not as delivered capacity. ASML itself says those ceilings sit below demand.
3. Ask any supplier who promises leading-edge volume growth well above about 10% a year to say which node, which year, and on what basis.

The decision test is simple. If your plan for 2027–28 needs leading-edge wafer volume to grow faster than it is growing now, it is betting against the toolmaker's own statement and the foundry's own volume record.